Phase lock loop (PLL) circuits are used for generating oscillation signals in various devices. The range of frequencies, within which a PLL circuit can produce a locked output varies with the operation temperature of the PLL circuit. Accordingly, a PLL circuit may be unable to stay locked when the operation temperature fluctuates too much. To increase the lock range of a PLL circuit, attempts have been made in the past to increase the size of a varactor in the PLL circuit. However, a bigger varactor increases the loop gain of a voltage control oscillator, which leads to an increased amplitude-modulation (AM) to phase-modulation (PM) noise conversion. The increased AM-to-PM noise conversion creates more phase noise in the PLL circuit, which may impact the performance of the PLL circuit as well as the devices adopting the PLL circuit. Therefore, there is a need for a PLL circuit with a dynamic lock range under various temperature conditions.